01590319

Component

Within the last several years, computer chip makers have steadily been increasing the number of CPU cores that enable multiple computations to be run simultaneously instead of sequentially. At the same time, PC-based Windows operating systems have mostly transitioned from 32-bit computing platforms to 64-bit platforms, and available RAM memory is steadily increasing. 64-bit programming holds the advantage that it removes the memory and programming limits that were previously in place for 32-bit and below platforms. Both technologies have the potential to dramatically improve transport model computing performance. Unfortunately, in many cases, dramatic programming changes are necessary to take advantage of these technologies. This paper describes research, development, and application of transportation models that utilize multi-core processing, parallel processing, and 64-bit programming. The paper describes the application of common transport models such as network skimming, assignment, logit evaluation, and matrix operations under multi-threaded simultaneous processing environments. For 64-bit programming, transport models that utilize large amounts of memory are analyzed. This paper also describes the research and results of combining these optimization strategies, such as running multiple multi-core operations in parallel or on different computers. The paper documents the performance of these models on large scale problems from the New York City, Los Angeles, San Diego, and other large metropolitan regions in the United States. Auxiliary issues encountered during development and implementation such as computer hardware, software and memory requirements, and computer and algorithm limitations, are also described in the paper. The paper found that parallel processing and multi-threading strategies improved runtimes of many transportation operations such as assignments and skimming. If operations were divided between too many cores however, parallel slowdown occurred and overall performance decreased. Distributed computing between multiple machines increased performance as well but was dependent upon network speeds and the availability of idle machines. Performing operations completely within memory dramatically sped up certain procedures, however care must be taken however to ensure sufficient available memory. The above strategies can be further combined to improve performance, however different strategies need to be tested to achieve an optimal result.

This paper was sponsored by TRB committee ADB50 Standing Committee on Transportation Planning Applications. Alternate title: Utilizing Multithreading, Parallel Processing, and Memory Management Techniques to Improve Transportation Model Performance

01584066

16-2386

English

18p

2016

Transportation Research Board 95th Annual Meeting

Digital/other

Figures; References; Tables

Distributed processing; Dynamic traffic assignment; Mathematical models; Optimization; Parallel processing; Programming (Mathematics)

Data and Information Technology; Highways; I72: Traffic and Transport Planning

Transportation Research Board Annual Meeting 2016 Paper #16-2386

TRIS, TRB, ATRI

Jan 12 2016 5:03PM